Course Syllabus for

Design and Theory of Phase Locked Loops
Konstruktion och teori för faslåsta slingor

EIT160F, 7.5 credits

Valid from: Autumn 2017
Decided by: Professor Thomas Johansson
Date of establishment: 2017-05-11

General Information

Division: Electrical and Information Technology
Course type: Third-cycle course
Teaching language: English


Phase locked loops have many applications and are important in wireless communication systems. The course will therefore provide knowledge in theory and design of phase locked loops.


Knowledge and Understanding

For a passing grade the doctoral student must understand how a phase locked loop works and can be used, and what parts give different limitations in achievable performance.

Competences and Skills

For a passing grade the doctoral student must be able to choose a suitable architecture for a phase locked loop and its parts to achieve a given performance with low cost and power consumption. Be able to simulate a basic phase locked loop in a CAD-environment for integrated circuits.

Judgement and Approach

For a passing grade the doctoral student must be able to benefit from reading scienfic papers on phase locked loop techniques.

Course Contents

Introduction to phase locked loops and frequency synthesis, basic phase locked loops, undesired signals and noise, frequency dividers, phase detectors, loop filters, architectures, aquisition aids, all digital phase locked loops, phase locked loops with controllable output phase

Course Literature

Egan, William F.: Frequency Synthesis by Phase Lock, Second Edition. Wiley, 2000. ISBN 0471321044.
The book Phase-Lock Basics by the same author is a good complement

Instruction Details

Types of instruction: Seminars, project. It is mandatory to participate in at least 80% of the seminars, and that each particiant is contributing to at least one seminar. A simulation project with report is also required.

Examination Details

Examination formats: Written report, seminars given by participants
Grading scale: Failed, pass

Admission Details

Admission requirements: Analog IC design (ETIN25) or equivalent

Further Information

Course Coordinator: Prof. Henrik Sjöland

Course Occasion Information

Contact and Other Information

Course coordinators:

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